wafer production process
Wafer production begins with the purification of sand into high-purity silicon, the formation of monocrystalline silicon rods through the straight drawing method, and the subsequent cutting, grinding, and polishing into smooth, round wafers.
On the surface of the wafer, circuit patterns are formed through complex processes such as photolithography and ion implantation, laying the foundation for chip manufacturing. Finally, the rigorously tested wafers are cut into individual chips ready for packaging.
wafer production process
Wafer Fabrication Process Flow
Wafer manufacturing is a highly complex process that can be roughly divided into the following key steps:
1. Silicon extracted from sand is purified, then dissolved and crystallized at high temperatures to form ultra-high purity silicon ingots. Further purification of metallurgical grade silicon through chlorination reactions, distillation and chemical reduction processes
2. Surface cleaning: removing impurities and contaminants from the wafer surface.
3. Initial oxidation: Formation of a layer of silicon dioxide (SiO2) as an insulating layer.
4. Diamond saws are used to cut the silicon ingots into thin sheets of uniform thickness, which are wafers. The wafer sizes are 150mm, 200mm and 300mm.
5. CVD deposition: Chemical vapor deposition deposits a silicon nitride (Si3N4) layer for protection and masking.
6. Single crystal silicon rods are cut according to the appropriate size and processed by grinding and polishing to finally obtain a wafer with a smooth mirror-like surface.
7. Photolithography: coating photoresist, exposure, development, and definition of circuit patterns.
8. Dry oxidation and wet oxidation: generate or remove specific oxide layers for isolation or formation of device structures.
9. Ion implantation: such as boron (B+3) injection to form P-type regions, phosphorus (P+5) injection to form N-type regions.
10. Annealing treatment: activate the injected impurities to reduce defects.
11. Multi-layer deposition and etching: Includes deposition and lithography of polysilicon layers to form the gate structure.
12. Source-drain formation: For NMOS and PMOS, arsenic (As) and boron (B) are injected to form the source-drain, respectively.
13. After cutting the wafer surface rough, need to form a smooth surface through grinding and polishing
14. Final processing: including the formation of passivation layer, the back side of the wafer processing, etc., in preparation for packaging.